1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method thereof, which are particularly suitable for salicide CMOS transistor applications.
2. Description of the Related Art
Advancements in miniaturization and speedups of a semiconductor device in recent years have been increasing the need for a high-performance and low-power-consumption transistor. In order to meet such a need, it is crucial to solve a problem of wiring delay by lowering the resistance of various wires. To this end, for example, a so-called silicide structure, and further, a so-called salicide structure are adopted in a CMOS transistor or the like.
The salicide structure is achieved by depositing metal, which is commonly W or Co, on the gate and the impurity diffusion layer followed by sintering, thereby allowing silicon and the metal to react with each other. In this case, in order to prevent shorting the gate to the impurity diffusion layer through the silicide film, a sidewall is formed to electrically isolate the gate and the impurity diffusion layer. Also, the impurity diffusion layer is formed so that a shallow junction region (extension region) and a deep junction region (source/drain region) overlap by performing ion implantation twice before and after the formation of the sidewall.
According to the salicide structure described above, an impurity concentration in the extension region tends to increase to meet the need to further lower the resistance. A CMOS transistor commonly uses boron (B) having a high diffusion coefficient as an impurity for a PMOS transistor, and arsenic (As) having a low diffusion coefficient for an NMOS transistor. When a dose of arsenic is increased to lower the resistance in the extension region and to ensure the overlaps with the gate in the NMOS transistor, it becomes difficult to optimize an amount of overlaps in each transistor. Further, a higher concentration of arsenic in the extension region of the NMOS transistor gives rise to unwanted creeping of metal silicide into the semiconductor substrate, which poses a problem that the gate shorts to the source/drain.